4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

Jean-François Côté

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Clock controller for at-speed testing of scan circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Clocking methodology for at-speed testing of scan circuits...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Clocking methodology for at-speed testing of scan circuits...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Efficient video processing method and system

Computer graphics processing and selective visual display system – Computer graphics processing – Graphic manipulation
Reexamination Certificate

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Fault insertion method, boundary scan cells, and integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2374569

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