Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
2011-04-19
2011-04-19
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C438S014000
Reexamination Certificate
active
07927895
ABSTRACT:
A method for determining resistances of defects in a test structure, comprising: forming a first layer of the test structure having elements under test; generating a first e-beam image of the first layer, the first e-beam image graphically identifying defects detected at the first layer, each defect at the first layer having a corresponding grey scale level; adding capacitance to the structure by forming a metal layer of the structure; generating a second e-beam image of the metal layer, the second e-beam image graphically identifying defects detected at the metal layer, each defect at the metal layer having a corresponding grey scale level; generating a pattern of grey scale levels for each defect based on the corresponding grey scale level of each defect at each layer of the test structure; and determining a resistive range of each defect based on the pattern of grey scale levels generated for each defect.
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Lavoie Christian
Murray Conal E.
Patterson Oliver D.
Wisnieff Robert L.
Booth Richard A.
Cantor & Colburn LLP
International Business Machines - Corporation
MacKinnon Ian
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