Variable memory refresh devices and methods

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S201000, C365S230060

Reexamination Certificate

active

07929368

ABSTRACT:
Memory devices and methods are described such as those that monitor and adjust characteristics for various different portions of a given memory device. Examples of different portions include tiles, or arrays, or dies. One memory device and method described includes monitoring and adjusting characteristics of different portions of a 3D stack of memory dies. One characteristic that can be adjusted at multiple selected portions includes refresh rate.

REFERENCES:
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patent: 6247104 (2001-06-01), Suzuki
patent: 6658078 (2003-12-01), Anegawa et al.
patent: 7107383 (2006-09-01), Rajan
patent: 7545698 (2009-06-01), Safvi et al.
patent: 2005/0146919 (2005-07-01), Ellis et al.
patent: 2008/0031067 (2008-02-01), Lovett
patent: WO-2004019340 (2004-03-01), None
“International Application Serial No. PCT/US2009/069858, Search Report and Written Opinion mailed Apr. 28, 2010”, 10 pgs.

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