Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent
1999-01-04
2000-10-17
Tokar, Michael
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
326 30, 326 31, 326 32, 326 33, 326 34, 326 86, 326 83, 326 87, 326121, H03K 1716
Patent
active
061337498
ABSTRACT:
A programmable variable impedance output driver circuit uses analog biases to match driver output impedance to load input impedance. A current mirror is used to obtain a measurement of an external resistance value for matching the impedance of a driven load. The mirrored current generates the voltage "NBIAS" when passed through the resistively connected NFET. Similarly, the current is again mirrored and passed through a resistively connected PFET resulting in the voltage "PBIAS". The analog bias voltages, NBIAS and PBIAS are used to vary the impedance of complementary FETs in an impedance matched driver for a high degree of dI/dt control. The driver provides a high degree of flexibility because its turn-on and turn-off characteristics do not depend on a combination of digital control signals connected directly to the driving FETs as in the prior art. Instead, the PBIAS and NBIAS signals provide analog controls which may be applied to single transistors whose impedance changes as PBIAS and NBIAS increase or decrease.
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Hansen Patrick R.
Pilo Harold
International Business Machines - Corporation
Tan Vibol
Tokar Michael
Walsh, Esq. Robert A.
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