UV-enhanced oxy-nitridation of semiconductor substrates

Details UV-enhanced oxy-nitridation of semiconductor substrates UV-enhanced oxy-nitridation of semiconductor substrates

2002-01-08

2004-03-16

Ghyka, Alexander (Department: 2812)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S287000, C438S770000

Reexamination Certificate

active

06706643

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to processes for forming ultra-thin dielectric films for ULSI applications. The processes have particular advantage when used for forming oxynitride films on silicon semiconductor substrates with chemical vapor deposition (CVD) techniques.
BACKGROUND OF THE INVENTION
The current trend in integrated circuits is to use ultra thin dielectric layers when fabricating metal-oxide-semiconductors (MOS). A gate oxide layer is typically formed by thermal oxidation of a silicon semiconductor substrate in a substantially pure oxygen atmosphere. In ultra large scale integrated (ULSI) circuits, however, such gate oxide layers in the metal oxide semiconductor field effect transistor (MOSFET) can exhibit undesirable characteristics, such as relatively high defect densities and charge trapping, and relatively low reliability and low resistance to hot carrier effects. Composite oxide-nitride dielectrics have been experimented with in order to achieve very thin dielectric films with the required equivalent oxide thickness (EOT), as well as all the other qualities required to meet performance specifications. While higher nitrogen content in the oxynitride can be advantageous, it may also degrade the mobility of the transistors.
Once the semiconductor substrate surface has been cleaned, it is subjected to a series of rapid thermal heating processes (RTP) to form the multi-layer gate stack. Those processes often consist of: (1) growing an oxynitride layer with nitric oxide (NO); (2) depositing a silicon nitride (SiN
x
) layer with a rapid thermal chemical vapor deposition (RTCVD) process; (3) rapid thermal annealing the substrate with the SiN
x
layer in an ammonia (NH
3
) environment; and (4) rapid thermal annealing the substrate in an N
2
O environment. These four steps generally are considered standard in a 4-step gate stack dielectric growth.
The first step is the most critical. The goals of the oxynitride layer growth step are as follows: to achieve very thin EOT of the gate stack dielectric film; to grow an oxynitride layer with appropriate nitrogen content; to grow an oxynitride layer that allows good quality growth of silicon nitride applied on the oxynitride layer; and to obtain high mobility for transistors.
Most commonly, the oxynitride film is formed with a rapid thermal NO or O
2
oxidation in which the substrate is heated rapidly in an atmosphere of NO or O
2
gases for a controlled, generally short, time. When such rapid thermal NO or O
2
oxidation is the first step in the 4-step gate stack dielectric growth process, the EOT of dielectric films ultimately formed on the semiconductor are almost always higher than 16 angstrom (Å). In the trend for producing thinner and thinner gate stack dielectrics, thinner oxynitride layers with still good performance are required. Unfortunately, the resultant dielectric films deteriorate rapidly, i.e. the leakage current density increases dramatically, when the EOT of the oxynitride is less than 16 Å.
The surface roughness of a CVD silicon nitride film deposited on a silicon dioxide layer has been found undesirably high (i.e., root mean square (RMS) roughness of about 10 Å and even up to 20 Å) when the physical thickness of the nitride layer is about 25 Å and below. Published research papers have indicated that the coalescence of nitride nucleation islands does not take place until the silicon nitride film physical thickness exceeds about 20 Å. See H. Resinger and A. Spitzer, “Electrical Breakdown Induced by Silicon Nitride Roughness in Thin Oxide-Nitride-Oxide Films,”
J. Appl. Phys
., V. 79, p. 3028 (1996); M. Copel, et. al., “Nucleation of Chemical Vapor Deposited Silicon Nitride on Silicon Dioxide,”
Appl. Phys. Lett
., V. 74, p. 1830 (1999); and Y. Hu, et al., “An In-Situ Real Time Measurement of the Incubation Time for Si Nucleation on SiO
2
in a Rapid Thermal Process,”
Appl. Phys. Lett
., V. 66, p. 700 (1995). Thus, because the growth of silicon nitride films on oxide layers appears to be dependent upon having sufficient nucleation sites, thinner nitride films have had unacceptable surface roughness leading to unacceptable gate dielectric characteristics.
More recently, some studies showed that remote plasma oxidation may improve the ultra-thin oxide interface. See Lucovsky, et al.,
Appl. Phys. Lett
., V. 74, p. 2005 (1999). Unfortunately, remote plasma oxidation requires special processing equipment and is complicated to use. Alternative approaches to create more nucleation sites and reduce surface roughness of the thin silicon nitride films are still being sought. In addition, alternative approaches to create dielectric films with lower EOT and less leakage current density are still being sought.
SUMMARY OF THE INVENTION
According to the invention, an oxynitride layer is formed on a semiconductor substrate using UV-oxidation as the first step in the 4-step gate stack dielectric growth process. In contrast to the prior art rapid thermal NO or O
2
oxidation, in our process, the semiconductor substrate surface is simultaneously exposed to UV radiation and a gaseous atmosphere containing O
2
and one or more gases selected from N
2
, NH
3
, N
2
O and H
2
. Preferably, the semiconductor substrate is silicon. Preferably, the oxynitride layer is formed on the substrate surface by exposing the substrate surface both to (1) UV radiation (from about 50% to 100% power of a maximum power of 200 Watt, preferably 70% power) and (2) the gaseous atmosphere for about 30 to 90 seconds (preferably 60 seconds), at a temperature of about 100 to 150° C. (preferably 130° C.) and at a pressure of about 80 to 120 Torr (preferably 100 Torr). Preferably, the O
2
gas is introduced at a flow rate of about 100 to 500 SCCM (Standard Cubic Centimeters per Minute), and the N
2
, NH
3
, N
2
O and/or H
2
gas is introduced at a flow rate of about 2,000 to 3,000 SCCM, with the O
2
gas comprising less than about 20% of the mixture in the gaseous atmosphere. Most preferably, the gaseous atmosphere consists of O
2
and N
2
gases, with the O
2
gas about 2 to 12% of the mixture in the gaseous atmosphere.
After the oxynitride layer is applied by UV-oxidation according to the invention, the remaining steps of the known 4-step gate stack process are carried out. A silicon nitride layer is applied onto the oxynitride layer, frequently using chemical vapor deposition. The substrate with SiN
x
layer is annealed in the presence of a NH
3
atmosphere and then further annealed in the presence of a N
2
O atmosphere.
In an alternate preferred embodiment, the semiconductor substrate surface is simultaneously exposed to UV radiation and a gaseous atmosphere containing O
2
and one or more gases selected from N
2
, NH
3
, N
2
O and H
2
. After an oxynitride layer is formed, the semiconductor substrate is exposed to UV radiation and a gaseous atmosphere containing NH
3
. The NH
3
is introduced at a flow rate of about 0.2 to 1.0 SLPM (Standard Liters Per Minute), at a temperature in the range of about 100 to 200° C. (preferably 150° C.) and at a pressure in the range of about 10 to 200 Torr (preferably 100 Torr). UV radiation is applied at a power setting of about 50% to 100% power of a maximum power of 200 Watt (preferably 70% power) for about 2 to 30 seconds. The substrate is then annealed using a rapid thermal process in inert ambient (preferably N
2
at a flow rate of 0.5 to 2 SLPM) at a temperature in the range of about 800 to 1000° C. and for a time of about 30 to 60 seconds.
We have found that by using UV-oxidation as the first step in the 4-step (e.g.,
FIG. 1
) gate stack dielectric growth process, one can obtain composite dielectric films with EOT values below 16 Angstrom (Å), and as low as 14.2 Å. The associated leakage current densities of the resulting dielectric films are also very low, on the order of 1.0E-01 A/cm
2
. This is more than one order of magnitude lower than that extrapolated from the prior art (solid line in FIG.
3
).
The ITRS (International Techno

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