Utilizing clock shield as defect monitor

Details Utilizing clock shield as defect monitor Utilizing clock shield as defect monitor

2006-02-28

2006-02-28

Nguyen, Vinh P. (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB

Reexamination Certificate

active

07005874

ABSTRACT:
Disclosed is a shielded clock tree that has one or more clock signal buffers and clock signal splitters, with clock signal wiring connecting the clock signal buffers to the clock signal splitters. Shielding is adjacent the clock signal wiring, where ground wiring connects the shielding to ground. The shielding comprises shield wires positioned adjacent and parallel to the clock signal wiring. The invention provides switches in the ground wiring, and these switches are connected to, and controlled by, a test controller.

REFERENCES:
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patent: 4833672 (1989-05-01), Steely
patent: 6006025 (1999-12-01), Cook et al.
patent: 6061814 (2000-05-01), Sugasawara et al.
patent: 6353352 (2002-03-01), Sharpe-Geisler
patent: 6610550 (2003-08-01), Pasadyn et al.
patent: 6613590 (2003-09-01), Simmons
patent: 6952117 (2005-10-01), Forbes

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