Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-01-29
2010-02-09
Ellis, Kevin L (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S732000
Reexamination Certificate
active
07661052
ABSTRACT:
A method and system for testing a high-speed circuit is disclosed. The method and system include obtaining a high-speed statistical signature of the high-speed circuit using a conventional tester. The method and system further include comparing the high-speed statistical signature of the high-speed circuit to an expected signature. Consequently, it can be determined whether the high-speed circuit functions within the desired parameters.
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Cranford, Jr. Hayden C.
Norman Vernon R.
Schmatz Martin L.
Ellis Kevin L
Gandhi Dipakkumar
International Business Machines - Corporation
McBurney Mark E.
Yee & Associates P.C.
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