Using isolated p-well transistor arrangements to avoid...

Details Using isolated p-well transistor arrangements to avoid... Using isolated p-well transistor arrangements to avoid...

2005-08-16

2005-08-16

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including signal clamping

C365S189090, C365S226000

Reexamination Certificate

active

06930930

ABSTRACT:
Leakage in semiconductors, such as dynamic random access memory (DRAM) devices, caused by word line/bit line shorts can be avoided by locating transistors (e.g., isolator, current limiter, equalize) inside isolated p-wells.

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