Using a first liner layer as a spacer in a semiconductor device

Details Using a first liner layer as a spacer in a semiconductor device Using a first liner layer as a spacer in a semiconductor device

2002-04-19

2004-04-06

Wilczewski, Mary (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S221000, C438S294000, C438S296000, C438S305000, C438S424000, C438S595000, C438S696000

Reexamination Certificate

active

06716710

ABSTRACT:

TECHNICAL FIELD
The present claimed invention generally relates to semiconductors. More specifically, the present claimed invention relates to a method of forming a semiconductor device.
BACKGROUND ART
Various techniques known in the art can be used to fabricate a semiconductor device such as an integrated circuit or processor. In general, these techniques typically involve applying a layer of material to an underlying substrate or over a preceding layer, and then selectively removing the material using an etch process. Using these techniques, the components of a semiconductor device, perhaps comprising different types of material, can be accurately formed and placed.
One type of component used by semiconductor devices is an isolation device. An isolation device, in general, includes a stacked gate isolated from an adjacent stacked gate by a shallow trench. The isolation device also typically includes a spacer formed on the sidewalls of the stacked gate.
Prior Art
FIGS. 1A through 1E
illustrate a prior art process for forming spacers in an isolation device. For simplicity of discussion, the process is described for a single spacer
50
(
FIG. 1E
) formed on the sidewall
11
of a stacked gate
10
adjacent to a shallow trench
12
. Shallow trench
12
is filled with a material such as high density plasma (HDP) oxide.
Referring first to
FIG. 1A
, a liner layer
14
of a first material, typically TEOS (tetraethylorthosilicate), is deposited over stacked gate
10
(including sidewall
11
) and shallow trench
12
. Liner layer
14
has a thickness of approximately 150 Angstroms (Å).
Next referring to
FIG. 1B
, a layer
16
of a second material, typically nitride, is deposited over the liner layer
14
. Referring now to
FIG. 1C
, an etch of layers
14
and
16
is performed, removing the nitride and essentially all of the TEOS from the horizontal surfaces of the isolation device; however, a thin layer of TEOS typically remains on the surface
18
over shallow trench
12
. Also, a layer
14
of TEOS and a layer
16
of nitride also remain on the sidewall of stacked gate
10
.
With reference to
FIG. 1D
, a layer
20
of material, typically nitride, is deposited over the remaining portions of layers
14
and
16
. Referring now to
FIG. 1E
, an etch of layer
20
is performed to remove layer
20
from the horizontal surfaces of the isolation device and to form a spacer
50
having a prescribed (design) thickness T
1
. Spacer
50
is thus formed of layers
14
,
16
and
20
using a process that includes two etches.
A problem with the process illustrated by
FIGS. 1A through 1E
is that, during the second etch, relatively significant gouging of the HDP oxide in shallow trench
12
often occurs. The liner layer
14
is reduced to a thin layer, or effectively removed, during the first etch. Any remaining portion of layer
14
is not sufficiently thick to withstand the second etch and serve as a protective layer for the shallow trench
12
for the duration of the second etch. Consequently, shallow trench
12
is exposed during the second etch, allowing the HDP oxide to be gouged by the etch.
As a result of the gouging, isolation issues may be introduced, reducing the effectiveness of the isolation device. If these isolation issues are not detected or corrected, the performance of the semiconductor device may also be affected. Detection and correction of the gouging can reduce the yield (throughput) of the fabrication process and increase the unit cost of the semiconductor device.
Accordingly, what is needed is a method and/or system that can be used to form spacers in an isolation device, but without gouging the shallow trench filler material. It is desirable that such a method and/or system accomplishes this while also improving yield and throughput. The present invention provides a novel solution to this need.
SUMMARY OF THE INVENTION
Embodiments of the present invention provide a method and system thereof that can be used to form spacers in an isolation device but without gouging the shallow trench filler material, with expected improvements in yield and throughput.
In one embodiment, a first layer comprising a first material is deposited to a first thickness on a sidewall of a stacked gate. A second layer comprising a second material is deposited over the first layer. The second layer is deposited without the first layer being etched; hence, the first thickness is unchanged along the sidewall. The second layer is etched and thereby reduced to a second thickness along the sidewall. The first layer and the second layer in combination form a spacer along the sidewall that has a thickness corresponding to the first thickness and the second thickness. Thus, according to the present embodiment of the present invention, the spacer is formed using a single etch.
In one embodiment, the first material comprises TEOS (tetraethylorthosilicate). In another embodiment, the second material comprises nitride.
In one embodiment, the stacked gate adjoins a shallow trench. In one such embodiment, the shallow trench is substantially filled with material comprising high density plasma (HDP) oxide. In another such embodiment, the first layer and the second layer are also deposited over the shallow trench, and the first layer protects the HDP oxide during the etching of the second layer.
In one embodiment, the first thickness is between approximately 300 and 500 Angstroms. In another embodiment, the second thickness is between approximately 950 and 1150 Angstroms.
In its various embodiments, the present invention reduces the number of processing steps, using one etch to form the spacer instead of multiple etches, and protects the shallow trench (e.g., the HDP oxide filler material) from gouging during the etch.


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