Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
Reexamination Certificate
1998-10-23
2001-07-03
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having junction gate
C438S047000, C438S172000, C438S264000, C438S312000, C257S009000, C257S014000, C257S025000
Reexamination Certificate
active
06255150
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the formation of crystalline silicon oxide barriers for use in semiconductor devices with particular but not sole use in connection with silicon-based resonant tunneling diodes.
2. Brief Description of the Prior Art
Resonant tunneling diodes are typically devices which are built on a semiconductor substrate, generally having (
100
) crystallographic orientation. The silicon-based diode structure generally includes a thin barrier layer of silicon oxide over the substrate onto which is deposited a layer of silicon. A further barrier layer of silicon oxide is deposited over the silicon layer with a gate electrode, which is a metal of doped polysilicon, formed thereover to complete the diode structure. According to the I-V (current vs. voltage) curve of such diodes), at a low voltage (below about 1 volt) across the diode as shown in
FIG. 1
at voltage V
1
in the current flow observed at voltages closely below and closely above voltage V
1
, this voltage rapidly tapering off at voltage V
2
and then rising exponentially starting at voltage V
3
. This phenomenon occurs because current flow generally does not occur until the current is able to go over the energy barrier of the barrier layer of the tunneling diode. However, if the barrier layer is sufficiently thin, such as from about 2 to about 8 monolayers or from about 6 to about 25 Angstroms (this distance depending upon the barrier layer molecules involved), then electrons can tunnel through the barrier. Furthermore, if the silicon well is sufficiently thin, i.e. from about 2 to about 8 monolayers and preferably about 5 monolayers or about 15 Angstroms, quantum levels are set up within the quantum well. Accordingly, if the voltage is tuned properly, the electron energy will align with one of the quantum states and travel through the quantum well as well as the barriers. However, if the voltage is such that the electron energy is not aligned with a quantum state (e.g. <V
1
volts) and has no quantum state in which to tunnel, the current flow drops until the energy level is sufficient to go over the barrier or until a higher quantum state, if present, has been reached. This explains the sudden peak in current flow at about V
1
volts as discussed above and shown in FIG.
1
. It follows that with sufficiently thin layers, tunneling is obtained to provide high current flow with low voltage levels. This is an important attribute in view of the present direction of the art toward the use of lower voltage components.
A key to the operation described above is that the well must by crystalline. This has not presented a problem in the prior art devices which are based upon group III-V compounds, such as gallium arsenide, because, for example, an epitaxially deposited aluminum gallium arsenide insulator layer can be formed over, for example, crystalline gallium arsenide. Crystalline gallium arsenide is a semiconductor with sufficiently close crystallographic lattice structure match to the aluminum gallium arsenide insulator such that the deposited insulator is also crystalline. This arrangement is not available using a silicon semiconductor well and using prior art techniques. The reason is that, in the fabrication of a silicon-based tunneling device, though starting with a crystalline (
100
) silicon substrate, the first barrier layer of silicon dioxide formed thereon by standard processing techniques cannot sustain a crystalline silicon layer thereover. Accordingly, the silicon dioxide layer over the crystalline substrate is amorphous, resulting in a silicon well which is also amorphous. It follows that the fabrication of silicon-based resonant tunneling diodes (RTDs) requires a high quality, crystalline quantum well surrounded by ultrathin barriers, which provide a suitable offset in the conduction band from the substrate and insulating barriers. Many materials can provide a large conduction band offset, however most of these materials yield a poor quality silicon quantum well. The ability to grow epitaxial, silicon lattice-matched insulators directly on silicon would allow fabrication of high quality silicon quantum wells for RTD and other applications.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a method whereby high quality quantum wells can be fabricated for RTDs and other applications. The method involves growth of lattice-matched electrically insulating films directly on Si (
100
) which do not react with the silicon substrate or the silicon quantum well. This allows growth of a single crystal silicon quantum well and extremely sharp interfaces between the electrically insulating layers and the quantum well. This is essential for high performance RTDs. Other methods involve insulating materials which react with the surrounding silicon and which yield defective, polycrystalline silicon quantum wells.
The method in accordance with the present invention uses only silicon-based materials for both the electrically insulating barriers and the quantum well, therefore providing excellent compatibility for fabrication. Since the silicon oxide layer can be deposited in a crystalline form with excellent lattice-matching to the substrate, a high quality silicon quantum well can be grown with a sharp interface and without a reaction layer forming at the interface. The silicon suboxide (SiO
x
) layer can also be grown epitaxially and, since it wets the silicon surface, this eliminates film uniformity problems. This approach therefore avoids the problems with most other methods because there is no concern for interface reaction and film uniformity of the electrically insulating barrier on the substrate.
The ability to deposit an electrically insulating, lattice matched material directly on Si (
100
) allows for high quality overgrowth of a silicon quantum well. By depositing a silicon suboxide (SiO
x
) layer with 0<×<2 on the silicon substrate under appropriate conditions, the suboxide layer is crystalline and semi-insulating. Using an electron beam evaporator source for silicon deposition and a backfilled oxygen ambient in the deposition chamber, a range of oxygen partial pressures and substrate temperatures can be used to obtain high quality SiO
x
layers on silicon. For substrate temperatures ranging from about 650 to about 750 degrees C. and oxygen partial pressures ranging from about 10
−7
to about 10
−4
Torr as shown in
FIG. 3
, oxygen concentrations from about ten atomic percent (sum of oxygen atoms divided by sum of oxygen and silicon atoms) up to about 40 atomic percent in the SiO
x
films have been observed with excellent crystalline quality when crystalline silicon is placed in an oxygen ambient under the above described conditions of temperature and pressure. Lower temperatures and higher oxygen pressures result in higher oxygen concentrations while higher temperatures and lower oxygen pressures result in lower oxygen contents. Inert gases, such as argon or helium, can be used with oxygen, but there is no advantage if silicon is evaporated. For CVD techniques, allowing for carrier gases such as nitrogen, SiH
4
, Si
2
H
6
, Si
2
Cl
2
H
2
are useful. Only the partial pressure of oxygen matters for obtaining crystalline suboxide (SiO
x
layer where 0<×<2). Electrical properties of individual suboxide films indicate that they are semi-insulating with resistivities of about 10
4
ohm-cm and conduction band offsets of about 0.5 eV. The electrical resistivity and barrier height both increase with increasing oxygen content. Therefore, in general, higher oxygen contents are desirable since these properties are tunable with oxygen content, however, there may be some applications where specific, lower resistivities and barrier heights are desirable.
In the above described manner, the suboxide film is a barrier with a conduction band offset and a crystalline silicon quantum well can be deposited over this SiO
x
layer to form a high quality crystalline silicon quantum well with shar
Brar Berinder P. S.
Wilk Glen D.
Brady W. James
Hoel Carlton H.
Malsawma Lex H.
Smith Matthew
Telecky , Jr. Frederick J.
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