Use of a polymer spacer and Si trench in a bitline junction...

Details Use of a polymer spacer and Si trench in a bitline junction... Use of a polymer spacer and Si trench in a bitline junction...

2011-03-15

2011-03-15

Thai, Luan C (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S311000, C257SE29309, C257SE29226, C257SE21409

Reexamination Certificate

active

07906807

ABSTRACT:
Memory devices having improved TPD characteristics and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line dielectrics between the memory cells. The bit line dielectrics can extend into the semiconductor. The memory cell contains one or more charge storage nodes, a first poly gate, a pair of first bit lines, and a pair of second bit lines. The second bit line can be formed at a higher energy level, a higher concentration of dopants, or a combination thereof compared to an energy level and a concentration of dopants of the first bit line.

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