Underlayer protection for the dual damascene etching

Details Underlayer protection for the dual damascene etching Underlayer protection for the dual damascene etching

2006-02-07

2006-02-07

Lee, Hsien-Ming (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S637000, C438S643000, C438S672000, C438S675000

Reexamination Certificate

active

06995085

ABSTRACT:
A method of protecting an underlying diffusion barrier layer in a dual damascene trench and via etch process with a coating of negative photoresist. The dual damascene process starts with via hole etching in an intermetal dielectric (IMD) layer. Next, the thin film barrier layer is deposited and patterned to fill the bottom of the vias. The key process step is a coating of negative photoresist which is exposed and developed to partially fill the via openings. This thick layer of negative photoresist in the vias protects the thin diffusion barrier layer from subsequent dual damascene etch processing.

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