Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2009-01-22
2010-11-02
Sarkar, Asok K (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257SE23021, C257SE23068, C257SE21508, C438S613000
Reexamination Certificate
active
07825511
ABSTRACT:
A system and method for eliminating undercut when forming a C4 solder bump for BLM (Ball Limiting Metallurgy) and improving the C4 pitch. In the process, a barrier layer metal stack is deposited above a metal pad layer. A top layer of the barrier layer metals (e.g., Cu) is patterned by CMP with a bottom conductive layer of the barrier metal stack removed by etching. The diffusion barrier and C4 solder bump may be formed by electroless plating, in one embodiment, using a maskless technique, or by an electroplating techniques using a patterned mask. This allows the pitch of the C4 solder bumps to be reduced.
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International Search Report and Written Opinion, Form PCT/ISA/220, BUR920060173, Lee W. Young, Jun. 27, 2008.
Daubenspeck Timothy H.
Gambino Jeffrey P.
Muzzy Christopher D.
Sauter Wolfgang
International Business Machines - Corporation
Kotulak, Esq. Richard
Sarkar Asok K
Scully , Scott, Murphy & Presser, P.C.
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