Ultra-thin Si MOSFET device structure and method of manufacture

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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Details

C438S446000, C438S282000, C438S298000, C257S347000, C257S349000, C257S524000

Reexamination Certificate

active

10725848

ABSTRACT:
The present invention comprises a method for forming an ultra-thin channel MOSFET and the ultra-thin channel MOSFET produced therefrom. Specifically, the method comprises providing an SOI substrate having a buried insulating layer underlying an SOI layer; forming a pad stack atop the SOI layer; forming a block mask having a channel via atop the pad stack; providing a localized oxide region in the SOI layer on top of the buried insulating layer thereby thinning a portion of the SOI layer, the localized oxide region being self-aligned with the channel via; forming a gate in the channel via; removing at least the block mask; and forming source/drain extensions in the SOI layer abutting the thinned portion of the SOI layer. Providing the localized oxide region further comprises implanting oxygen dopant through the channel via into a portion of the SOI layer; and annealing the dopant to create the localized oxide region.

REFERENCES:
patent: 4748134 (1988-05-01), Holland et al.
patent: 5360995 (1994-11-01), Graas
patent: 5468657 (1995-11-01), Hsu
patent: 6001706 (1999-12-01), Tan et al.
patent: 6010921 (2000-01-01), Soutome
patent: 6022768 (2000-02-01), Peidous
patent: 6064092 (2000-05-01), Park
patent: 6110779 (2000-08-01), Yang et al.
patent: 6162677 (2000-12-01), Miyakawa et al.
patent: 6300218 (2001-10-01), Cohen et al.
patent: 6417078 (2002-07-01), Dolan et al.
patent: 6465290 (2002-10-01), Suguro et al.
patent: 6479866 (2002-11-01), Xiang
patent: 6486037 (2002-11-01), Norcott et al.
patent: 6531741 (2003-03-01), Hargrove et al.
patent: 6673695 (2004-01-01), Lim et al.
patent: 2002/0153587 (2002-10-01), Adkisson et al.
patent: 2003/0186511 (2003-10-01), Yiu et al.

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