4. Semiconductor device manufacturing: process
  5. Making field effect device having pair of active regions...
  6. Having insulated gate

Meikei Ieong

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Buried stress isolation for high-performance CMOS technology

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

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CMOS on hybrid substrate with different crystal orientations...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

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CMOS on hybrid substrate with different crystal orientations...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

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CMOS on hybrid substrate with different crystal orientations...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate

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CMOS on hybrid substrate with different crystal orientations...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2106178

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