Ultra-thin body vertical tunneling transistor

Details Ultra-thin body vertical tunneling transistor Ultra-thin body vertical tunneling transistor

2005-08-29

2008-10-21

Lee, Calvin (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

Reexamination Certificate

active

07439576

ABSTRACT:
A vertical tunneling, ultra-thin body transistor is formed on a substrate out of a vertical oxide pillar having active regions of opposing conductivity on opposite ends of the pillar. In one embodiment, the source region is a p+ region in the substrate under the pillar and the drain region is an n+ region at the top of the pillar. A gate structure is formed along the pillar sidewalls and over the body layers. The transistor operates by electron tunneling from the source valence band to the gate bias-induced n-type channels, along the ultra-thin silicon bodies, thus resulting in a drain current.

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