Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-03-21
2004-06-29
Wille, Douglas (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S389000
Reexamination Certificate
active
06756644
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor devices and more specifically relates to a MOSFET having an ultra low gate to drain and gate to source capacitance and thus ultra low charges Q
GD
and Q
GS
.
BACKGROUND OF THE INVENTION
Very high speed power MOSFETs preferably have a minimized product of Q
G
and R
DSON
. To accomplish this minimal value, the value of the gate to drain capacitance should be minimized. Further, it is desired to have good immunity against dv/dt conditions and, for this purpose, a small ratio of Q
GD
/Q
GS
is desired, to produce good Cdv/dt immunity. It is also desired to provide a minimum R
DSON
and a low gate poly resistance, and in the manufacturing process, a minimum number of mask steps.
BRIEF DESCRIPTION OF THE INVENTION
In accordance with the invention, a greatly thickened oxide is disposed above the common conduction region or accumulation region between spaced bases of a vertical conduction planar power MOSFET having a cellular or striped base configuration. By increasing the spacing between the polysilicon gate and the drain surfaces over a substantial portion of their facing areas, the capacitance between the gate to the drain is substantially reduced. The ratio of Q
GD
/Q
GS
is also substantially reduced, producing excellent Cdv/dt immunity.
REFERENCES:
patent: 6046473 (2000-04-01), Blanchard
patent: 6087697 (2000-07-01), Patel
patent: 6589830 (2003-07-01), Zeng
patent: 050 773 (1982-05-01), None
International Rectifier Corporation
Ostrolenk Faber Gerb & Soffen, LLP
Wille Douglas
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