Two-step source side implant for improving source resistance...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S259000, C257S315000

Reexamination Certificate

active

06852594

ABSTRACT:
Methods of forming flash memory EEPROM devices having lightly doped source region near the critical gate region and a heavily doped source region away from the critical gate region. In a first embodiment a first source mask is formed exposing source regions and portions of the gates and implanting n dopant ions, replacing the first source mask with a second source mask that exposes a portion of the source regions and implanting n+dopant ions. In a second embodiment a source mask is formed exposing a portion of the source regions and implanting n+dopant ions.

REFERENCES:
patent: 6130452 (2000-10-01), Lu et al.
patent: 6265265 (2001-07-01), Lim

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