Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-12-30
1999-02-23
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438765, H01L 21336
Patent
active
058743448
ABSTRACT:
A two step source/drain annealing process which permits a dopant to be ion implanted directly into the silicon without a protective oxide. The gate oxide is removed before the ion implantation of the dopant occurs, thus the dopant is implanted directly into bare silicon. In a first step of the annealing process, a thin oxide is grown over the source and drain regions at a relatively low temperature (e.g., 600.degree. C.) this temperature to prevent the evaporation of the dopant from the silicon substrate and polysilicon gate. The second step of the annealing process occurs at a higher temperature allowing the dopant to be driven into the substrate forming the source and drain regions.
REFERENCES:
patent: 5525529 (1996-06-01), Guldi
Goodman, A.M. et al. "Thin Tunnelable Layers of Silicon Dioxide Formed by Oxidation of Silicon" J. Electrochem. Soc.: Electrochemical Technology vol. 117, No. 7 (1970) pp. 982-984.
Jan Chai-Hong
Thompson Scott E.
Bowers Charles
Intel Corporation
Thompson Craig
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