Two-step planer field oxidation method

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation

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438452, 438449, H01L 2176

Patent

active

057260931

ABSTRACT:
A method for the fabrication of semicondictor devices is disclosed, having a field oxide isolation which is co-planar with the adjacent silicon surface and which introduces lower mechanical stresses in the adjacent silicon than prior methods which seek co-planarity by removal of silicon by anisotropic etching methods. Instead, the excess silicon is removed by oxidation followed by selective oxide removal. A silicon substrate is provided and a multilayer oxidation mask is formed on it's surface consisting of a thin thermal oxide and a thicker film of silicon nitride. the mask is patterned by standard photolithographic methods and the field oxide region is pieced by selective reactive-ion-etching. The silicon is not penetrated in this step as it is in prior art. Instead a layer of silicon oxide it thermally grown to a thickness dependent upon the final field oxide thickness. This oxide is then unidirectionally etched to the silicon interface, leaving side pockets. A second oxidation is then performed to form the field oxide The oxidation mask is then removed by chemical etching. Semiconductor devices are subsequently formed in the regions adjacent to the field oxide. At no point in the process does thermal oxidation of sharp silicon edges occur. Thus the high intrinsic stresses which can lead to deep dislocations in the silicon, are avoided. Further, the presence of the side-pockets, to a great extent, inhibit lateral growth during the second oxidation.

REFERENCES:
patent: 5196367 (1993-03-01), Lu et al.
patent: 5229318 (1993-07-01), Straboni et al.
patent: 5256895 (1993-10-01), Bryant et al.
patent: 5656537 (1997-08-01), Iwamatsu et al.

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