Two-step metal salicide semiconductor process

Details Two-step metal salicide semiconductor process Two-step metal salicide semiconductor process

1997-03-28

1999-06-01

Quach, T. N.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438586, 438655, 438664, 438683, H01L 2128, H01L 21335

Patent

active

059083140

ABSTRACT:
A two-step metal salicide semiconductor process, suitable for a semiconductor substrate on which gates, sources (drains), spacers, and field oxides are formed. A first metal layer is formed on the gates. A first high-temperature process is executed to form a first metal salicide layer on the gates. A second metal layer is formed on the first metal salicide layer, sources (drains), spacers, and field oxides. A second high-temperature process is executed to form a thicker second metal salicide layer on the gates and a third metal salicide layer on the sources (drains). A wet etching is then performed. A dielectric layer is formded over the semiconductor substrate wherein the horizontal line of the dielectric layer is above the second metal salicide layer. Polishing is then performed. Finally, shallow contact windows and deep contact windows are then formed for the gates and sources (drains), respectively.

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Wolf, S., Silicon Processing for the VLSI Era, vol. 2, Lattice Press, 1990, pp. 144-150, 247-251, 279-283.

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