Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering
Reexamination Certificate
1995-01-13
2001-07-10
Nguyen, Nam (Department: 1753)
Chemistry: electrical and wave energy
Processes and products
Coating, forming or etching by sputtering
C204S192170
Reexamination Certificate
active
06258219
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a novel method of deposition for W, TiW or other metals on a silicon wafer and more particularly, relates to a novel method of deposition of a metal on a silicon wafer in a physical vapor deposition chamber equipped with a clamping ring without incurring arcing problem between the wafer and the clamping ring by utilizing a two-step high-pressure/low-pressure process.
BACKGROUND OF THE INVENTION
Physical vapor deposition (PVD) is a frequently used processing technique in the manufacture of semiconductor wafers that involves the deposition of a metallic layer on the surface of a silicon wafer. It is also known as sputtering. In recently developed advanced semiconductor devices, PVD is used to deposit metallic layers of W and TiW as contact layers.
In a PVD process, inert gas particles, such as argon, are first ionized in an electric field producing a gas plasma and are attracted toward a source or target where the energy of these gas particles physically dislodges, or sputters off, atoms of the metallic or other source material. PVD is a versatile technique in that many materials can be deposited using not only RF but also DC power sources.
In a typical PVD process chamber, major components include a stainless steel chamber that is vacuum-tight and equipped with a helium leak detector, a pump with the capacity to reduce the chamber pressure to 10
−6
Torr or below, pressure gauges, a sputter source or target, a power supply, a wafer holder, and a clamping ring. The sputter source and the wafer holder are positioned facing each other. The target is a W or TiW disc when sputtering of W or TiW is desired. Such a sputter source is the Endura® 5500 available from Applied Materials, Inc. of Santa Clara, Calif. In some systems, the wafer holder is a pedestal including an internal resistive heater.
The clamping ring serves two purposes in the process chamber. The first purpose is to clamp the wafer to the heater. This holds the wafer in place on the pedestal when a positive gas pressure is applied between the heater and the pedestal and thus allows heat to effectively conduct between the wafer and the heater. The second purpose is to create a predetermined leak rate of argon from under the wafer into the process chamber.
The clamping ring is circular in shape and has an oriented cut-out match the wafer's flat contour. A hood is built into the clamping ring which is used for shadowing purpose. Shadowing protects the lip of the clamping ring from being coated by the deposited metal material. The lip allows the force of the clamping ring to be distributed evenly around the wafer.
When a W, TiW or other metal target is used in a PVD chamber, the emission of sputtered W or TiW is shaped with a forward cosine distribution. As a consequence, the W or TiW film is deposited uniformly at the center and edge parts of the wafer, but this film does not penetrate to cover the areas under the hood. As the deposition process progresses, a differential in voltages between the clamping ring and the wafer surface causes discharging or arcing between those two members. When arcing occurs, severe damage is done to the wafer which causes a significant part of the wafer or possibly the entire wafer to be scrapped.
Others have attempted to prevent arcing problem in a PVD process by making modifications to the processing equipment. For instance, some have cut down the hood area of the clamping ring such that atoms can reach under the hood more easily to thus form a bridge between the clamping ring and the silicon wafer surface which avoids arcing. However, an excessive bridge formation between the clamping ring and the wafer surface can cause a particulate contamination problem for the wafer. Others have attempted to modify the magnetron power source forming and shaping the plasma by changing the magnets in order to reduce electron bombardment. This involves major equipment modifications and re-qualification of the equipment for certain processes.
It is therefore an object of the present invention to provide a novel method of depositing W, TiW, or other metal on silicon wafers in a PVD chamber without the arcing problem while avoiding the shortcomings of the prior art methods.
It is another object of the present invention to provide a W or TiW deposition process in a PVD chamber without the arcing problem and without making modifications to the processing equipment.
It is yet another object of the present invention to provide a novel method of depositing metal on silicon wafers in a PVD chamber without the arcing problem by incorporating a simple process modification.
It is a further object of the present invention to provide a novel method of depositing a metal on silicon wafers in a PVD chamber without the arcing problem by using a two-step high-pressure/low-pressure deposition process.
SUMMARY OF THE INVENTION
In accordance with the present invention, a novel method of depositing W, TiW or other metal films on silicon wafers by a sputtering technique without the arcing problem is provided.
In the preferred embodiment, the novel deposition technique for W or TiW without the occurrence of arcing is carried out in a two-step high-pressure/low-pressure process. A process chamber is first purged with an inert gas such as argon or helium. The deposition of W or TiW is then conducted at a high chamber pressure of greater than 11 mTorr for at least 5 seconds. The chamber pressure is then reduced to below 11 mTorr, where the deposition process continues until such a time that a sufficient thickness of W or TiW film is built up. The deposition power used can be any power in the range between 1 and 12 kW for a 13-inch (33 cm) target.
The first-step, high-pressure process for W or TiW builds up a conducting bridge in the clamping ring shadow area such that the voltage differential between the wafer and the clamping ring can be discharged without arcing. This first-step, high-pressure process is then supplemented by a low-pressure process to produce a semiconductor film that has superior properties and without high residual stress.
REFERENCES:
patent: 3729406 (1973-04-01), Osborne et al.
patent: 3856648 (1974-12-01), Fuller et al.
patent: 4978412 (1990-12-01), Aoki et al.
patent: 5019234 (1991-05-01), Harper
patent: 5037262 (1991-08-01), Moll et al.
patent: 0145672 (1985-08-01), None
patent: 0183961 (1986-08-01), None
Ku et al., “Use in X-ray Masks”, J. Vac. Sci Technol. B6(6), Nov./Dec. 1988, p. 2174-2177.
Applied Materials Inc.
Nguyen Nam
Thomason, Moser & Patterson L.L.P.
LandOfFree
Two-step deposition process for preventing arcs does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Two-step deposition process for preventing arcs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Two-step deposition process for preventing arcs will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2447165