Two-stage etching process

Details Two-stage etching process Two-stage etching process

2003-02-03

2004-09-07

Kornakov, M. (Department: 1746)

Etching a substrate: processes

Gas phase etching of substrate

Etching a multiple layered substrate where the etching...

C216S063000, C216S064000, C216S067000, C216S068000, C216S074000, C216S079000, C438S706000, C438S707000, C438S710000, C438S711000, C438S714000, C438S716000, C438S719000, C438S723000, C438S724000

Reexamination Certificate

active

06787054

ABSTRACT:

BACKGROUND
The present invention relates to a method for etching substrates and cleaning the etching chamber.
In the manufacture of integrated circuits, silicon dioxide, silicon nitride, polysilicon, metal silicide, and monocrystalline silicon on a substrate, are etched in predefined patterns to form gates, vias, contact holes, trenches, and/or interconnect lines. In the etching process, a patterned mask layer composed of oxide or nitride hard mask or photoresist, is formed on the substrate using conventional methods. The exposed portions of the substrate between the patterned mask are etched by capacitive or inductively coupled plasmas of etchant gases. During the etching processes, a thin etch residue deposits on the walls and other component surfaces inside the etching chamber. The composition of the etch residue depends, among other things, upon the composition of vaporized species of etchant process gas, the substrate material being etched, and the mask or resist layer applied on the substrate. For example, when tungsten silicide, polysilicon or other silicon-containing layers are etched, silicon-containing gaseous species are vaporized or sputtered from the substrate, and etching of metal layers results in vaporization of metal species. In addition, the resist or mask layer on the substrate is also partially vaporized by the etchant gas to form gaseous hydrocarbon or oxygen species. The vaporized or gaseous species in the chamber condense to form polymeric byproducts composed of hydrocarbon species from the resist; gaseous elements such as fluorine, chlorine, oxygen, or nitrogen; and elemental silicon or metal species depending on the composition of the substrate being etched. The etch byproducts deposit as thin layers of etch residue on the walls and components in the chamber. The composition of the etch residue layer typically varies considerably across the chamber surface depending upon the composition of the localized gaseous environment, the location of gas inlet and exhaust ports, and the chamber geometry.
The compositionally variant, non-homogeneous, etch residue layer formed on the etching chamber surfaces has to be periodically cleaned to prevent contamination of the substrate. Typically, after processing of about 25 wafers, an in-situ plasma “dry-clean” process is performed in an empty etching chamber to clean the chamber. However, the energetic plasma species rapidly erode the chamber walls and chamber components, and it is expensive to often replace such parts and components. Also, erosion of the chamber surfaces can result in instability of the etching process from one wafer to another. The thin compositionally variant etch residue can also make it difficult to stop the in-situ plasma clean process upon removal of the thin layer of residue, resulting in erosion of the underlying chamber surfaces, and making it difficult to clean the hard residue off all the chamber surfaces. For example, the etch residue formed near the chamber inlet or exhaust often has a higher concentration of etchant gas species than that formed near the substrate which typically contains a higher concentration of resist, hard mask, or of the material being etched.
It is difficult to form a cleaning plasma that uniformly etches away the compositional variants of etch residue. Thus after cleaning of about 100 or 300 wafers, the etching chamber is opened to the atmosphere and cleaned in a “wet-cleaning” process, in which an operator uses an acid or solvent to scrub off and dissolve accumulated etch residue on the chamber walls. To provide consistent chamber surface properties, after the wet cleaning step, the chamber surfaces are “seasoned” by pumping down the chamber for an extended period of time, and thereafter, performing a series of runs of the etch process on dummy wafers. The internal chamber surfaces should have consistent chemical surfaces, i.e., surfaces having little or no variations in the concentration, type, or functionality of surface chemical groups; otherwise, the etching processes performed in the chamber produce widely varying etching properties from one substrate to another. In the pump-down process, the chamber is maintained in a high vacuum environment for 2 to 3 hours, to outgas moisture and other volatile species trapped in the chamber during the wet clean process. Thereafter, the etch process to be performed in the chamber, is run for 10 to 15 minutes on dummy wafers, or until the chamber provides consistent and reproducible etching properties.
In the competitive semiconductor industry, the increased cost per substrate that results from the downtime of the etching chamber, during the dry or wet cleaning, and seasoning process steps, is highly undesirable. It typically takes 5 to 10 minutes for each dry cleaning process step, and 2 to 3 hours to complete the wet cleaning processes. Also, the wet cleaning and seasoning process often provide inconsistent and variable etch properties. In particular, because the wet cleaning process is manually performed by an operator, it often varies from one session to another, resulting in variations in chamber surface properties and low reproducibility of etching processes. Thus it is desirable to have an etching process that can remove or eliminate deposition of etch residue on the chamber surfaces.
In semiconductor fabrication, yet another type of problem arises in the etching of multiple layers of materials that have similar constituent elements, for example, silicon-containing materials such as tungsten silicide, polysilicon, silicon nitride, and silicon dioxide. With reference to
FIGS. 1
a
and
1
b
, a typical polycide structure on a semiconductor substrate
25
comprises metal silicide
22
deposited over doped or undoped polysilicon
24
. The polycide structures are formed over silicon dioxide
26
, and etched to form the etched features
30
. In these structures, it is difficult to obtain a high etching selectivity ratio for etching the metal silicide
22
relative to overlying resist
28
, or the underlying polysilicon
24
. It is especially desirable to have high etching selectivity ratios for polycide structures that have a convoluted topography, having thicker and thinner portions of metal silicide
22
. This requires that the polysilicon
24
be etched sufficiently slowly relative to the rate of etching of the metal silicide
22
, that all the polysilicon
24
below the thinner portions of metal silicide
22
are not etched through, before completion of etching of the thicker portion of overlying metal silicide
22
. Thus, it is desirable to etch the metal silicide
22
at a faster rate relative to the rate of etching of the polysilicon
24
.
A similar problem arises in the opening or etching of a mask layer of silicon nitride
32
, on a thin silicon dioxide layer
34
, prior to forming trenches in a substrate comprising silicon
36
, as for example shown in
FIGS. 1
c
,
1
d
and
1
e
. In this silicon trench isolation (STI) process, the nitride mask
32
is opened
38
to allow for the creation of etched trenches in the silicon
36
that are used, for example, to isolate active MOSFET devices formed on the substrate. The etching selectivity ratio for etching silicon nitride layer
32
relative to silicon dioxide
34
and the underlying silicon
36
has to be very high to stop on the silicon dioxide layer without etching through the silicon dioxide layer
34
and into the silicon substrate
36
.
FIG. 1
d
is a generalized depiction of the prior art process. In actuality the etch is not as ideal as shown in
FIG. 1
d
. In fact, generally, the underlying silicon substrate
36
is somewhat etched into and the nitride layer
32
and the silicon dioxide layer
34
is not entirely etched. Maximizing the complete etch of the nitride layer
32
and the silicon dioxide layer
34
while minimizing the etching of the silicon substrate
36
is difficult. The nitride layer
32
must be etched in such a manner as to be highly selective to the oxide layer
34
, often termed the pad oxide. Prior techniques have often etched throu

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