Two square NVRAM cell

Details Two square NVRAM cell Two square NVRAM cell

1999-09-13

2000-03-21

Phan, Trong

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438270, 438589, H01L 218247

Patent

active

060402180

ABSTRACT:
A non-volatile random access memory (NVRAM) cell and method of fabrication thereof. Pairs of NVRAM cells, each including three FETs stacked in a NAND-like structure are formed vertically in silicon pillars. Source devices at the bottom of the pillar selectively provide ground to one of the cells. A floating gate extends upward from the source device's gate line. A control gate plate extending between adjacent pillars selectively provides a programming voltage to the control gate. Both the source gate and the control gate are capacitively coupled through silicon rich oxide to the floating gate. Polysilicon plugs between silicon pillars are word line gates for cells in adjacent pillars. A diffusion at the top of each pillar is a bit line contact for both cells at the pillar. Each pair of cells on a pillar are on a common bit line and a common word line. The word line, control gate and source gate line select individual cells in the pair.

REFERENCES:
patent: 5196722 (1993-03-01), Bergendahl et al.
patent: 5399516 (1995-03-01), Bergendahl et al.
patent: 5467305 (1995-11-01), Bertin et al.
patent: 5510630 (1996-04-01), Agarwarl et al.
patent: 5656544 (1997-08-01), Bergendahl et al.
patent: 5780341 (1998-07-01), Ogura
patent: 5930619 (1999-07-01), Noble

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