Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
1998-11-16
2002-09-10
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S010000, C710S025000, C710S035000, C711S149000, C712S010000, C712S014000
Reexamination Certificate
active
06449664
ABSTRACT:
BACKGROUND
1. Technical Field
The present invention relates generally to data management; and, more particularly, it relates to image data management and transfer within image processing systems.
2. Description of Prior Art
Conventional data management systems typically employ a cache memory in between a processor and random access memory to overcome the operating frequency mismatch between the two devices which inevitably slows processing rates. In data management systems that employ a significant amount of random access memory, relatively long electrical traces are often required to interconnect the various elements. Long traces that connect various elements within data management and communication systems suffer from deleterious capacitance thereby greatly limiting maximum data transfer rates. Typical maximum operating frequencies with respect to data transfer are in the tens of megahertz range for random access memory and in the hundreds of megahertz range and greater for modern processors. Modern digital signal processors typically provide some of the highest operating frequencies in the art.
The traditional solution of installing expensive cache memory in between the random access memory and the processor is an intrinsically expensive solution to avoid the mismatch of operating frequencies given the high cost of cache memory. Low cost systems particularly suffer from this limitation in that very little, if any, cache memory is typically installed because of the relatively high cost associated with it. This high cost associated with cache memory prohibits the use of the traditional solution in many low cost applications. The types of applications that can justify utilizing cache memory are typically systems that have a very generous system budget with sufficient margin to accommodate the expensive cache memory. Absent an implementation of some solution such as the introduction of cache memory the operating frequency mismatch between the memory and the processor, a data transfer bottleneck occurs between the processor and the memory in such data management systems.
Conventional image processing systems that employ cache memory to assist in data management suffer from other operational limitations. The typical method in which image data is stored in memory creates an additional difficulty for traditional methods of data management in that the data are stored in a plurality of one-dimensional arrays coordinated by a common addressing scheme. While this traditional approach is sufficient to keep track of the data for later retrieval and use, the data are undesirably partitioned in a manner that precludes efficient processing on a two-dimensional subset of the data. A difficulty arises in image processing where only a predetermined two-dimensional cross sectional area is to be processed. For example, in many applications, modification of only a specific portion of an image is required. For these applications, the data management system must go into a whole host of individual one-dimensional arrays and extract only the requisite portion of data within each individual one-dimensional array to assemble the predetermined two-dimensional cross sectional area that is to be processed. Conventional data management systems that perform this extraction function are ill-suited to perform high speed image processing.
Further limitations and disadvantages of conventional and traditional systems will become apparent to one of skill in the art after reviewing the remainder of the present application with reference to the drawings.
SUMMARY OF THE INVENTION
Various aspects of the present invention can be found in a data management system that maximizes processing resources in image processing systems. A two-dimensional direct memory access system performs efficient transfer of a plurality of image data to a memory where it is then processed using a processor. The effective provision of the two-dimensional portion of a plurality of image data to the processor provides significantly reduced processing times than provided by conventional data management and processing systems.
In certain embodiments of the invention, the two-dimensional direct memory access system contains a two-dimensional direct memory access machine that operates cooperatively with a ping-pong memory buffer to maximize further the processing efficiency of the plurality of image data. The two-dimensional direct memory access machine transfers a specific cross sectional area of the plurality of image data to the processor. The efficient method of providing the processor only with the specific cross sectional area of the plurality of image data that is to be processed at a given time provides decreased processing time and a better utilization of processing resources within the two-dimensional direct memory access system.
Other aspects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.
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IBM TDB, ‘Image Scaling With Two-Dimensional Memory Arrays’, vol. 34, Issue #2, pp. 4-9, Jul. 1991.
Honary Hooman
Moskalev Anatoly
Akin Gump Strauss Hauer & Feld & LLP
Gaffin Jeffrey
Perveen Rehana
Rourk Christopher J.
Viewahead Technology, Inc.
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