Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-05-23
2008-08-19
Tran, Binh X (Department: 1792)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S659000, C438S714000, C438S719000, C438S738000, C216S060000, C216S079000, C156S345420
Reexamination Certificate
active
07413992
ABSTRACT:
The embodiments provides an improved tungsten silicide etching process with reduced etch rate micro-loading effect. In one embodiment, a method for etching a layer formed on a substrate is provided. The method includes providing a substrate into a plasma processing chamber, the substrate having a metal silicide layer formed thereon and a patterned mask defined over the metal silicide layer. The method also includes supplying an etching gas mixture of a fluorine-containing gas, a chlorine-containing gas, a nitrogen-containing gas, and an oxygen-containing gas to the plasma processing chamber, wherein the ratio of the nitrogen-containing gas to the fluorine-containing gas is between about 5 to about 15. In addition, the method includes generating a plasma in the plasma processing chamber using the supplied etching gas mixture to etch the metal silicide layer in regions not covered by the patterned mask, the patterned mask defining dense regions and isolated regions, wherein the generated plasma is configured to remove the metal silicide layer in the dense regions and the isolated regions at a reduced etch rate micro-loading.
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Lee Linda Fung-Ming
Lee Sam Do
Liu Shenjian
Singh Harmeet
Tan Sok Kiow
Angadi Maki
Lam Research Corporation
Martine & Penilla & Gencarella LLP
Tran Binh X
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