Tunable threshold SOI device using back gate well

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257392, 257901, H01L 2701

Patent

active

059427817

ABSTRACT:
A fully depleted SOI device includes a semiconductor substrate and a conductive well of a first conductivity type formed in a principal surface of the semiconductor substrate. An insulating layer is formed along the principal surface of the semiconductor substrate and extends across the conductive well. A transistor is formed on the insulating layer such that the insulating layer is interposed between the transistor and the semiconductor substrate, with the transistor including source and drain regions of the first conductivity type formed on the insulating layer, a channel region of a second conductivity type formed on the insulating layer and aligned over the conductive well, and a gate electrode aligned over the channel region. A metal contact is connected to the conductive well for applying a reverse bias potential to the transistor.

REFERENCES:
patent: 5001528 (1991-03-01), Bahraman
patent: 5166765 (1992-11-01), Lee et al.
patent: 5614433 (1997-03-01), Mandelman
patent: 5629544 (1997-05-01), Voldman et al.
patent: 5773863 (1998-06-01), Burr et al.
patent: 5818099 (1998-10-01), Burghartz

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