Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-23
2007-10-23
Ngô, Ngân V. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S200000, C438S218000, C257SE27065, C257SE21630
Reexamination Certificate
active
11474022
ABSTRACT:
The present invention discloses a triple well structure, which includes a substrate of a first conductive type, a deep buried well of a second conductive type, a well of a first conductive type, a well ring of a second conductive type, and a well ring of a first conductive type. The deep buried well of the second conductive type is in the substrate. The well of the first conductive type is disposed over the deep buried well of the second conductive type in the substrate. The well ring of the second conductive type surrounds the well of the first conductive type. The well ring of the first conductive type is between the well of the first conductive type and the well ring of the second conductive type.
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patent: 6573588 (2003-06-01), Kumamoto et al.
patent: 6979869 (2005-12-01), Chen et al.
patent: 2003/0053335 (2003-03-01), Hart et al.
patent: 2004/0164354 (2004-08-01), Mergens et al.
patent: 2005/0093073 (2005-05-01), Baird et al.
J.C. Patents
Ngo Ngan V.
United Microelectronics Corp.
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