Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-07-09
2000-11-28
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438396, 438201, 438211, 257295, 257296, H01L 218242
Patent
active
061534633
ABSTRACT:
A novel capacitor design and construction method that uses a stacked structure which is sometimes otherwise used for a so-called floating gate transistor. A first electrical contact is electrically coupled with a conductive region formed in the substrate and with a control gate layer. A second electrical contact is electrically coupled with a floating gate layer, forming a plate between the substrate and control gate layers. The footprint of this capacitor is reduced by using both sides of the floating gate layer as capacitive plate. Parasitic capacitance is relatively reduced. One or more dielectric layers can be formed for both capacitors and for floating gate transistors on the substrate in the same process step or steps.
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Lin Yen-Tai
Wei Hon-Sco
Beffel, Jr. Ernest J.
Macronix International Co. Ltd.
Monin, Jr. Donald L.
Pham Hoai
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