Trigger device for ESD protection circuit

Details Trigger device for ESD protection circuit Trigger device for ESD protection circuit

2005-08-08

2009-11-03

Purvis, Sue (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE29328

Reexamination Certificate

active

07612410

ABSTRACT:
The present invention is a trigger device useful, for example, in triggering an SCR in an ESD protection circuit. Illustratively, an NMOS trigger device comprises a gate and heavily doped P and N regions in a P-well on opposite sides of the gate. A first N type source/drain extension and a first P-type pocket region extend from the P region toward the N region with the pocket region located under the source/drain extension and extending under the gate. A second N-type source/drain extension and a second P-type pocket region extend from the N region toward the P region with the pocket region located under the source/drain extension and extending under the gate. Preferably, the gate itself is heavily doped so that one half of the gate on the side adjacent the heavily doped P region is also heavily doped with dopants of P-type conductivity and the other half of the gate on the side adjacent the heavily doped N region is also heavily doped with dopants of N-type conductivity. Doping the gate increases the threshold voltage by about one Volt due to an increase in the work function on the source side of the gate.

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