Trenched gate metal oxide semiconductor device and method

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257332, 257333, H01L 2976, H01L 2994, H01L 27108

Patent

active

060970618

ABSTRACT:
A Metal Oxide Semiconductor (MOS) transistor and method for improving device scaling comprises a trenched polysilicon gate formed within a trench etched in a semiconductor substrate and further includes a source region, a drain region, and a channel region. The source and drain region are laterally separated by the trench in which the trenched polysilicon gate is formed and partially extend laterally beneath the bottom surface of the trench. The channel region is formed in the silicon substrate beneath the bottom surface of the trench. In one embodiment, the top surface of the trenched polysilicon gate is substantially planar to the substrate surface. In another embodiment, the top surface and a portion of the trenched polysilicon gate are disposed above the substrate surface.

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patent: 5705415 (1998-01-01), Orlowski et al.
patent: 5770878 (1998-06-01), Beasom
patent: 5773343 (1998-06-01), Lee et al.
patent: 5883399 (1999-03-01), Yin et al.
patent: 5953602 (1999-09-01), Oh et al.

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