Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-04-25
2006-04-25
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S589000
Reexamination Certificate
active
07033892
ABSTRACT:
A structure of accumulated type trench MOSFET in silicon carbide(SiC) and forming method are disclosed. The MOSFET includes a trench gate having a gate oxide layer, a polysilicon layer, a source region, and a drain region. The source region contains a p+ heavily doped region, an n+ heavily doped region and a p-base region, and a source contact metal layer. The p+ heavily doped region the n+ heavily doped region and the p-base region are abutting each other. The former two are extended to the front surface of the silicon carbide substrate having the source contact metal layer formed over and the latter one is beneath them. Moreover, the p-base region is separated from the trench by an accumulation channel. The drain contact metal layer is formed on the rear surface of the silicon carbide substrate where the rear region of the silicon carbide is heavily doped than the front region thereof.
REFERENCES:
patent: 5506421 (1996-04-01), Palmour
patent: 5915180 (1999-06-01), Hara et al.
patent: 6281521 (2001-08-01), Singh
patent: 6566708 (2003-05-01), Grover et al.
Chuo Yen
Hsu Chih-Wei
Lee Yung-Chung
Pan Tsung-Ming
Chaudhari Chandra
Industrial Technology Research Institute
Troxell Law Office PLLC
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