Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-17
2006-01-17
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S270000, C438S271000, C257S332000, C257S923000
Reexamination Certificate
active
06987040
ABSTRACT:
A MOSFET device (50) has a trench (60) extending from a major surface (56) of the device (50). Within the trench (60), a gate structure (62) is formed where the top surface (64) is below the major surface (56). Source regions (66, 68) are formed along a vertical wall (84) inside of the trench (60). The source regions (66, 68) have a horizontal component along the major surface (56) and a vertical component extending the vertical wall (84). The majority of the source regions (66, 68) are formed along the vertical wall (84) within the trench (60). A typical aspect ratio of the vertical length of the source regions (66, 68) to the horizontal width is greater than 3:1. An Inter-layer dielectric (ILD) layer (74) is formed on the gate structure (62) within the trench (60) below the major surface (56). A metal electrode layer (82) is formed above the major surface (56) where a portion is formed inside the trench (60) making source contact to the source regions (66, 68) inside the trench (60) along the vertical wall (84) of the trench (60).
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Jackson Kevin B.
Pham Long
Rao Shrinivas H.
Semiconductor Components Industries L.L.C.
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