Trench free process for SRAM

Details Trench free process for SRAM Trench free process for SRAM

1996-09-25

1998-01-06

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438597, 148DIG20, H01L 218234

Patent

active

057054371

ABSTRACT:
A method of forming an FET device starts by forming a sacrificial layer over a semiconductor substrate and an outer buried contact region is produced by ion implantation into the substrate, followed by stripping the sacrificial layer, forming a gate oxide layer, and depositing polysilicon over the gate oxide layer. Then, etch an inner buried contact opening through the polysilicon and the gate oxide layer down to the substrate over the outer buried contact region forming an etched buried contact opening. Implant dopant into the substrate through the inner buried contact opening in the second mask to dope the substrate forming the inner buried contact region within the outer buried contact region self-aligned with the etched buried contact opening. Form a blanket, second polysilicon layer over the gate oxide layer reaching down through the etched buried contact opening into electrical and mechanical contact with the inner buried contact region. Etch to form the interconnect and the gate electrode from the polysilicon layers, and form source/drain regions.

REFERENCES:
patent: 4906588 (1990-03-01), Harrington, III
patent: 5208168 (1993-05-01), Parrillo et al.
patent: 5376577 (1994-12-01), Roberts et al.
patent: 5451534 (1995-09-01), Yang
patent: 5602049 (1997-02-01), Wen et al.

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