Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-09-27
2005-09-27
Nadav, Ori (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S268000, C438S270000, C438S587000, C257S335000, C257S337000, C257S343000
Reexamination Certificate
active
06949432
ABSTRACT:
A trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface and methods of making the same. The transistor structure comprises: (1) a first region of semiconductor material of a first conductivity type; (2) a gate trench formed within the first region; (3) a layer of gate dielectric within the gate trench; (4) a gate electrode within the gate trench adjacent the layer of gate dielectric material; (5) a drain access trench formed within the first region; (6) a drain access region of conductive material located within the drain access trench; (7) a source region of the first conductivity type within the first region, the source region being at or near a top surface of the first region and adjacent to the gate trench; (8) a body region within the first region below the source region and adjacent to the gate trench, the body region having a second conductivity type opposite the first conductivity type; and (9) a second region of semiconductor material within the first region below the body region. The second region is of the first conductivity type and has a higher dopant concentration than the first semiconductor region. Moreover, the second region extends from the gate trench to the drain access trench and is self-aligned to both the gate trench and the drain access trench.
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Bonham, Esq. David B.
General Semiconductor Inc.
Mayer Fortkort & Williams PC
Nadav Ori
Williams Esq. Karin L.
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