Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-29
2005-03-29
Jackson, Jerome (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S386000, C438S224000, C438S253000, C438S387000, C438S396000
Reexamination Certificate
active
06872620
ABSTRACT:
A Deep Trench (DT) capacitor in a semiconductor substrate has an isolation collar formed on trench sidewalls above the DT bottom. An outer plate is formed below the collar. Capacitor dielectric is formed on DT walls below the collar. An node electrode is formed in the DT, recessed below the DT top. The collar is recessed in the DT. A combined poly/counter-recrystallizing species cap is formed over the node electrode with a peripheral strap. The cap may be formed after formed a peripheral divot of a recessed collar, followed by forming an intrinsic poly strap in the divot and doping with a counter-recrystallization species, e.g. Ge, into the node electrode and the strap. Alternatively, the node electrode is recessed followed by codeposition of poly and Ge or another counter-recrystallization species to form the cap and strap.
REFERENCES:
patent: 5936271 (1999-08-01), Alsmeier et al.
patent: 6326658 (2001-12-01), Tsunashima et al.
patent: 6436760 (2002-08-01), Wong et al.
patent: 20030181006 (2003-09-01), Schrems
Chidambarrao Dureseti
Jammy Rajarao
Mandelman Jack A.
Jackson Jerome
Jones II Graham S.
Nguyen Joseph
Schnurmann H. Daniel
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