Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-02-20
2004-06-15
Chen, Jack (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S244000, C438S249000, C438S386000, C438S389000, C438S392000
Reexamination Certificate
active
06750096
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the field of integrated circuits. The invention relates to a trench capacitor and a corresponding production method.
For discussion purposes, the invention will be described with reference to the formation of a single trench capacitor.
Integrated circuits (ICs) or chips contain capacitors for purposes of the charge storage element, for instance, a dynamic random access memory (DRAM). The charge status in the capacitor represents a data bit.
A DRAM chip contains a matrix of memory cells configured in rows and columns, which are controlled by word lines and bit lines. The reading of data from the memory cells or the writing of data therein is accomplished by activating appropriate word lines and bit lines. A DRAM memory cell typically contains a transistor that is connected to a capacitor.
The charge stored in the capacitor dissipates over time due to leakage currents. Before the charge dissipates to an indeterminate level below a threshold value, the storage capacitor must be refreshed. For this reason, such memory cells are referred to as dynamic RAM (DRAM). Methods for producing memory capacitors are taught in the following documents: U.S. Pat. No. 5,867,420 to Alsmeier, U.S. Pat. No. 5,065,273 to Rajeevakumar, U.S. Pat. No. 4,649,625 to Nicky C. Lu, U.S. Pat. No. 5,658,816 to Rajeevakumar, U.S. Pat. No. 5,512,767 to Noble, Jr., U.S. Pat. No. 5,869,868 to Rajeevakumar, U.S. Pat. No. 5,691,549 to Lam, et al., U.S. Pat. No. 5,641,694 to Kenney, U.S. Pat. No. 5,744,386 to Kenney, U.S. Pat. No. 5,310,698 to Wild, U.S. Pat. No. 5,831,301 to Horak et al., and Europe Patent No. 0 949 680 A2, corresponding to U.S. Pat. No. 6,008,104 to Schrems. A substep in the forming of a trench capacitor is the forming of a buried plate that forms the outer capacitor electrode.
The closest prior art with respect to the forming of the buried plate is European Patent Application 0 271 072, corresponding to U.S. Pat. No. 4,755,486 to Treichel et al. Typically, the buried plate is disposed in the lower region of the trench capacitor, and an insulating collar isolates the upper region of the trench. The object of the insulating collar is, among other things, to prevent leakage currents between the two capacitor electrodes of the trench capacitor. It is, therefore, necessary that leakage currents occurring as a consequence of dopant residues be avoided in the region of the insulating collar. The dopant residues emerge in the forming of the buried plate. The forming of a buried plate for the purpose of producing a trench capacitor is described in U.S. Pat. No. 5,618,751 to Golden et al., which first describes that an arsenic-doped glass layer being deposited in the trench directly on the exposed silicon substrate. An undoped glass or ozonic TEOS is deposited on the arsenic-doped glass layer. Next, the trench is filled with varnish. In the top region of the trench, the layers are removed again. Lastly, in a drive-in step at elevated temperature, the buried plate is formed by diffusion of the dopant out of the arsenic-doped glass.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a trench with buried plate and method for its production that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices and methods of this general type and that forms the buried plate such that dopant residues do not remain in the top region of the trench where the insulating collar is formed, and, thus, leakage currents that can discharge the trench capacitor are avoided.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a method for forming a trench with a buried plate, including the steps of forming a trench in a substrate, the trench having a sidewall, an upper region, and a lower region, forming an undoped silicon oxide layer on the trench sidewall in the upper and lower regions of the trench, forming a doped silicate glass fill in the upper and lower regions of the trench, removing the doped silicate glass fill and the undoped silicon oxide layer from the upper region of the trench, and increasing temperature to diffuse dopant from the doped silicate glass fill into the substrate through the undoped silicon oxide layer and to form a buried plate in the substrate in the lower region of the trench.
In the method according to the invention, a trench is etched in a substrate, and an undoped silicon oxide layer is formed, on which a doped silicate glass fill is applied. In another advantageous step of the method according to the invention, the dopant diffuses from the doped silicate glass fill through the undoped silicon oxide layer during a temperature step and forms a buried plate.
The underlying idea of the invention is to form an undoped silicon oxide layer below the silicate glass fill that delivers the dopant for the buried plate. As such, with the aid of oxide etching the doped silicate glass can be removed from the region of the upper trench in which the insulating collar is formed without leaving any residues. This result occurs because of the protective undoped silicon oxide layer, which keeps the dopant from the silicate glass fill away from the sidewall of the trench. With the etching process that removes the silicate glass fill and the undoped silicon oxide layer, the silicate glass fill is completely removed through the underlying undoped silicon oxide.
In accordance with another mode of the invention, the doping of the undoped silicon oxide layer is less than 10
18
cm−
3
, and the doping of the doped silicate glass fill is greater than 10
18
cm−
3
.
In accordance with a further mode of the invention, at least one of the group consisting of boron, phosphorous, and arsenic is used for the doping of the doped silicate glass fill.
In accordance with an added mode of the invention, the undoped silicon layer is formed by thermal oxidation.
In accordance with an additional mode of the invention, the undoped silicon oxide layer is formed in an integrated processing step immediately prior to the deposition of the doped silicate glass fill.
In accordance with yet another mode of the invention, the undoped silicon oxide layer is deposited in an integrated processing step immediately prior to the doped silicate glass fill.
In accordance with yet a further mode of the invention, the undoped silicon oxide layer is formed to a thickness between 0.1 and 25 nm.
In accordance with yet an added mode of the invention, the trench having the doped silicate glass fill is filled with varnish, the varnish in the upper region of the trench is removed, the doped silicate glass fill and the undoped silicon oxide layer are removed in the upper region of the trench, the remaining varnish is removed from the trench, an oxide cover layer is deposited and then temperature is increased to diffuse dopant into the substrate, and the oxide cover layer, the doped silicate glass fill, and the undoped silicon oxide layer are removed.
In accordance with yet an additional mode of the invention, the oxide cover layer is removed and the doped silicate glass fill and the undoped silicon oxide layer are removed from the lower region of the trench.
In accordance with again another mode of the invention, the trench having the doped silicate glass fill is filled with a sacrificial silicon material, the sacrificial silicon material, the doped silicate glass fill, and the undoped silicon oxide layer are removed in the upper region of the trench, temperature is subsequently increased to diffuse dopant into the substrate, an insulation trench layer is deposited in the upper region of the trench, and the sacrificial silicon material, the doped silicate glass fill, and the undoped silicon oxide layer are removed from the lower region of the trench.
In accordance with a concomitant mode of the invention, a second undoped silicon oxide layer is deposited in the trench having the doped silicate glass fill, the trench is filled with varnish, the varnish, the second undoped silicon ox
Schrems Martin
Steck Sabine
Chen Jack
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
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