Trench capacitor of a DRAM and fabricating method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S248000, C257SE21008, C257SE27016, C257SE27092

Reexamination Certificate

active

07407852

ABSTRACT:
A method of fabricating trench capacitors is described. A substrate having at least one isolation structure is provided. A first trench and a second trench are formed in the substrate beside the isolation structure. A first lower electrode and a second lower electrode are formed in the substrate around the first trench and the second trench. A first capacitor dielectric layer and a second capacitor dielectric layer are formed on the respective surfaces of the first trench and the second trench. A first upper electrode and a second upper electrode are formed to fill the first trench and the second trench. A portion of the isolation structure between the first trench and the second trench is removed to form an opening. A conductive layer is formed to fill the opening and connect electrically with the first upper electrode and the second upper electrode.

REFERENCES:
patent: 6391705 (2002-05-01), Hsiao et al.
patent: 6551874 (2003-04-01), Pohl et al.
patent: 6552382 (2003-04-01), Wu
patent: 7041567 (2006-05-01), Chen et al.
patent: 2003/0132438 (2003-07-01), Jang
patent: 2004/0197988 (2004-10-01), Heineck et al.
patent: 2005/0184326 (2005-08-01), Cheng
patent: 2006/0084224 (2006-04-01), Watanabe et al.
patent: 2007/0015327 (2007-01-01), Su

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