Trench-capacitor DRAM device and manufacture method thereof

Details Trench-capacitor DRAM device and manufacture method thereof Trench-capacitor DRAM device and manufacture method thereof

2008-04-01

2008-04-01

Tsai, H. Jey (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S248000, C438S386000, C257SE27092

Reexamination Certificate

active

11420222

ABSTRACT:
A method for fabricating a trench capacitor is disclosed. A substrate having a first pad layer is provided. STI structure is embedded into the first pad layer and the substrate. A second pad layer is deposited over the first pad layer and the STI structure. Two adjacent trenches are etched into the first, second pad layers, and the semiconductor substrate. The second pad layer and a portion of the STI structure between the two trenches are etched to form a ridge. A liner is formed on interior surface of the trenches. A first polysilicon layer is formed on the liner. A capacitor dielectric layer is formed on the first polysilicon layer. The two adjacent trenches are filled with a second polysilicon layer. The second polysilicon layer is then etched until the capacitor dielectric layer is exposed. The fabrication process is easy to integrate to SoC chip.

REFERENCES:
patent: 2006/0270150 (2006-11-01), Lee

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