Transmission lines for CMOS integrated circuits

Details Transmission lines for CMOS integrated circuits Transmission lines for CMOS integrated circuits

2006-09-05

2006-09-05

Wilson, Christian (Department: 2824)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C257S664000

Reexamination Certificate

active

07101778

ABSTRACT:
Improved methods and structures are provided for impedance-controlled low-loss lines in CMOS integrated circuits. The present invention offers a reduction in signal delay. Moreover, the present invention further provides a reduction in skew and crosstalk. Embodiments of the present invention also provide the fabrication of improved transmission lines for silicon-based integrated circuits using conventional CMOS fabrication techniques. One method of the present invention provides transmission lines in an integrated circuit. Another method includes forming transmission lines in a memory device. The present invention includes a transmission line circuit, a differential line circuit, a twisted pair circuit as well as systems incorporating these different circuits all formed according to the methods provided in this application.

REFERENCES:
patent: 3478230 (1969-11-01), Otter, Jr. et al.
patent: 3676718 (1972-07-01), Anderson et al.
patent: 3816673 (1974-06-01), Miya
patent: 4308421 (1981-12-01), Bogese, II
patent: 4372032 (1983-02-01), Collins et al.
patent: 4640871 (1987-02-01), Hayashi et al.
patent: 4749888 (1988-06-01), Sakai et al.
patent: 4933743 (1990-06-01), Thomas et al.
patent: 4962476 (1990-10-01), Kawada
patent: 4994688 (1991-02-01), Horiguchi et al.
patent: 5135889 (1992-08-01), Allen
patent: 5157361 (1992-10-01), Gruchalla et al.
patent: 5165046 (1992-11-01), Hesson
patent: 5223808 (1993-06-01), Lee et al.
patent: 5357138 (1994-10-01), Kobayashi
patent: 5363550 (1994-11-01), Aitken et al.
patent: 5510758 (1996-04-01), Fujita et al.
patent: 5663596 (1997-09-01), Little
patent: 5729047 (1998-03-01), Ma
patent: 5772153 (1998-06-01), Abaunza et al.
patent: 5910684 (1999-06-01), Sandhu et al.
patent: 6022787 (2000-02-01), Ma
patent: 6133621 (2000-10-01), Gaibotti et al.
patent: 6143616 (2000-11-01), Geusic et al.
patent: 6181004 (2001-01-01), Koontz et al.
patent: 6226599 (2001-05-01), Namiki
patent: 6242796 (2001-06-01), Sim et al.
patent: 6255852 (2001-07-01), Forbes et al.
patent: 6281042 (2001-08-01), Ahn et al.
patent: 6350649 (2002-02-01), Jeong et al.
patent: 6373740 (2002-04-01), Forbes et al.
patent: 6388198 (2002-05-01), Bertin et al.
patent: 6420778 (2002-07-01), Sinyansky
patent: 6433408 (2002-08-01), Anjo et al.
patent: 6545338 (2003-04-01), Bothra et al.
patent: 6555858 (2003-04-01), Jones et al.
patent: 6569757 (2003-05-01), Weling et al.
patent: 6570248 (2003-05-01), Ahn et al.
patent: 6600339 (2003-07-01), Forbes et al.
patent: 6692898 (2004-02-01), Ning
patent: 6737887 (2004-05-01), Forbes et al.
patent: 6764941 (2004-07-01), Yang et al.
patent: 6787888 (2004-09-01), Forbes et al.
patent: 6787906 (2004-09-01), Yang et al.
patent: 6794735 (2004-09-01), Forbes et al.
patent: 6815804 (2004-11-01), Forbes
patent: 6833317 (2004-12-01), Forbes et al.
patent: 6844256 (2005-01-01), Forbes et al.
patent: 6846738 (2005-01-01), Forbes et al.
patent: 6852613 (2005-02-01), Forbes et al.
patent: 2002/0145901 (2002-10-01), Forbes et al.
patent: 2003/0173652 (2003-09-01), Forbes et al.
patent: 2003/0173653 (2003-09-01), Forbes et al.
patent: 2003/0176023 (2003-09-01), Forbes et al.
patent: 2003/0176025 (2003-09-01), Forbes et al.
patent: 2003/0176050 (2003-09-01), Forbes et al.
patent: 2003/0176052 (2003-09-01), Forbes et al.
patent: 2003/0176053 (2003-09-01), Forbes et al.
patent: 2005/0006727 (2005-01-01), Forbes et al.
patent: 2005/0007817 (2005-01-01), Forbes et al.
patent: 2005/0017327 (2005-01-01), Forbes et al.
patent: 2005/0023650 (2005-02-01), Forbes et al.
patent: 2005/0030803 (2005-02-01), Forbes et al.
Gabara, T..J. ,et al. ,“Digitally Adjustable Resistors in CMOS for High-Performance Applications”,IEEE Journal of Solid-State Circuits, 27(8), (1992), 1176-1185.
Gunning, B..,et al. ,“A CMOS Low-Voltage-Swing Transmission-Line Transceiver”,Digest of Technical Papers— IEEE International Solid State Circuits Conference, San Francisco, CA,(1992),pp. 58-59.
Johnson, H..W. , et al. ,“High Speed Digital Design”,A Handbook of Black Magic, Prentice Hall PTR, Upper Saddle River, New Jersey,(1993),pp. 422 & 426.
Lee, K..,et al. ,“Modeling and Analysis of Multchip Module Power Supply Planes”, IEEE, (1995),pp. 628-639.
Lee, K..,“On-Chip interconnects—gigahertz and beyond”,Solid State Technology, (1998),pp. 85-88.
Rabaey, J..M. ,Digital Integrated Circuits, A Design Perspective, Prentice Hall, Upper Saddle River, New Jersey, ISBN 0-13-178609-1, (1996),pp. 482-493.
Ramo, S..,et al. ,Fields and Waves in Communication Electronics, Third Edition, John Wiley & Sons, Inc.,(1994),pp. 428-433.
Seevinck, E..,et al. ,“Current-Mode Techniques for High-Speed VLSI Circuits with Application to Current Sense Amplifier for CMOS SRAM's”,IEEE Journal of Solid State Circuits, 26(4), (Apr. 1991),pp. 525-536.
Thomas, M..,et al. ,“VLSI Multilevel Micro-Coaxial Interconnects for High Speed Devices”,IEEE, (1990),4 pages.
Arnoldussen, Thomas C., “A Modular Transmission Line/Reluctance Head Model”,IEEE Transactions on Magnetics, 24, (Nov. 1988),2482-2484.
Hsu, Yimin , et al., “High frequency field permeability of patterned Ni80Fe20 and Ni45Fe55 thin films”,Journal of Applied Physics. 89(11), (Jun. 1, 2001),6808-6810.
Hsu, et al., “Low temperature fired NiCuZn ferrite”,IEEE Transactions on Magnetics, 30(6), (1994),4875-4877.
Johnson, H. , “In: High Speed Digital Designs: A Handbook of Black Magic”,Prentice-Hall. Inc., New Jersey, ISBN 0-13-395724-1, (1993),66-71, 194-197.
Senda, M , “Permeability Measurement of Soft Magnetic Films at High Frequency and Multilayering Effect”,IEEE Translation Journal on Magnetics in Japan, vol. 8, No. 3, (Mar. 1993),pp. 161-168.
Webb, Bucknell C., et al., “High-frequency permeability of laminated and unlaminated, narrow, thin-film magnetic stripes (invited)”,Journal of Applied Physics, (1991),5611, 5613, 5615.
Webb, Bucknell C., et al., “The high field, high frequency permeability of narrow, thin-film magnetic stripes”,IEEE Transactions of Magnetics, vol. 27,(1991),pp. 4876-4878.
Zhang, Hongguo , et al., “Investigation on Structure and Properties of Low-Temperature Sintered Composite Ferrites”,Materials Research Bulletin, 35, (2000),2207-2215.
Zhenxing, Yue , et al., “Low-Temperature Sinterable Cordicrite Glass-ceramics”, High Technology Letters (China), 10 (115), (2000),96-97.
Arnoldussen, Thomas C., “A Modular Transmission Line/Reluctance Head Model”,IEEE Transactions on Magnetics, 24, (Nov. 1988), 2482-2484.
Hsu, Yimin, et al., “High frequency high field permeability of patterned Ni80Fe20 and Ni45Fe55 thin films”,Journal of Applied Physics, 89(11), Jun. 1, 2001), 6808-6810.
Hsu, et al., “Low temperature fired NiCuZn ferrite”,IEEE Transactions on Magnetics, 30(6), (1994), 4875-4877.
Johnson, H., “In: High Speed Digital Designs: A Handbook of Black Magic”, Prentice-Hall Inc., New Jersey, ISBN 0-13-395724-1, (1993), 66-71, 194-197.
Ramo, S., “Fields and Waves in Communication Electronics”,John Wiley & Sons, Inc., New York, 3rd ed.,(1994), pp. 428-433.
Senda, M, “Permeability Measurement of Soft Magnetic Films at High Frequency and Multilayering Effect”,IEEE Translation Journal on Magnetics in Japan, vol. 8, No. 3, (Mar. 1993), pp. 161-168.
Webb, Bucknell C., “High-frequency permeability of laminated and unlaminated, narrow, thin-film magnetic stripes (invited)”,Journal of Applied Physics, (1991), 5611, 5613, 5615.
Zhang, Hongguo, et al., “Investigation on Structure and Properties of Low-Temperature Sintered Composite Ferrites”,Materials Research Bulletin, 35, (2000), 2207-2215.
Zhenxing, Yue, et al., “Low-Temperature Sinterable Cordicrite Glass-ceramics”, High Technology Letters (China), 10 (115), (2000), 96-97.

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