Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Pulse shaping
Reexamination Certificate
2002-02-06
2004-08-31
Chang, Daniel (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Pulse shaping
C326S113000, C326S135000, C327S170000
Reexamination Certificate
active
06784689
ABSTRACT:
BACKGROUND OF INVENTION
A typical computer system includes at least a microprocessor and some form of memory. The microprocessor has, among other components, arithmetic, logic, and control circuitry that interpret and execute instructions necessary for the operation and use of the computer system.
FIG. 1
shows a typical computer system (
10
) having a microprocessor (
12
), memory (
14
), integrated circuits (
16
) that have various functionalities, and communication paths (
18
), i.e., buses and signals, that are necessary for the transfer of data among the aforementioned components of the computer system (
10
).
The various computations and operations performed by the computer system are facilitated through the use of signals that provide electrical pathways for data to propagate between the various components of the computer system. A voltage value of a signal can typically transition from high to low and low to high. However, due to the sizes and complexities of modern integrated circuits, signals are often routed in a manner where data on a particular signal must propagate a relatively long distance to get from one element in the integrated circuit to another element in the integrated circuit. Such long propagation distances may lead to signal transition attenuation, i.e., a loss of signal integrity. Further, various impedance-procuring effects across an integrated circuit, such as noise, electromagnetic interference, cross-coupling capacitance (i.e., “crosstalk” or “switching noise”), process variations, voltage variations, and resistor-capacitor loads, may also adversely affect signal integrity.
FIG. 2
shows a low to high signal transition (
20
) and a high to low signal transition (
22
) during a typical ‘signal transition period,’ where the signal transition period is defined as the period it takes for a signal transition to complete. More specifically, the switching speed from a high state to a low state is defined as a signal's fall time and the switching speed from a low state to a high state is defined as a signal's rise time. When a signal transition period of a signal is too long, components dependent on that signal may be adversely affected. For instance, long signal transition periods may lead to, among other things, skew, functional mistiming, synchronous function degradation, inaccurate operation, and system malfunction. Thus, especially as signal frequencies continue to increase, there is a need for a design that decreases a signal transition period of a signal, or, in other words, a design that accelerates signal transitions on a signal, thereby decreasing signal rise and fall times.
SUMMARY OF INVENTION
According to one aspect of the present invention, in an integrated circuit that has a signal path to which a negative impedance device is operatively connected, the negative impedance device comprises a pull-up stage having an output responsive to a low to high transition on the signal path, a pull-down stage having an output responsive to a high to low transition on the signal path, and a reset stage that activates at least one of the pull-up stage and the pull-down stage after a transition occurs.
According to another aspect, in an integrated circuit that has a signal to which a negative impedance device is operatively connected, the negative impedance device comprises pull-up means for accelerating a low to high transition on the signal, pull-down means for accelerating a high to low transition on the signal, and reset means for activating at least one of the pull-up means and the pull-down means after a transition occurs.
According to another aspect, a signal transition accelerator comprises a pull-up stage having an output responsive to a low to high transition on a signal path; a pull-down stage having an output responsive to a high to low transition on the signal path; and a reset stage that activates the pull-up stage after the high to low transition, where the pull-up stage responds more quickly to the low to high transition than does the pull-down stage.
According to another aspect, a method for accelerating a transition of a signal on a signal path comprises inputting the signal to a pull-up stage, where an output signal of the pull-up stage is operatively coupled to the signal path after a high to low transition on the signal; and inputting the signal to a pull-down stage, where an output signal of the pull-down stage is operatively coupled to the signal path after a low to high transition on the signal, and where the pull-up stage outputs an accelerated low to high transition when the signal begins to transition from low to high.
According to another aspect, a method for accelerating a transition of a signal on a signal path comprises activating a pull-up stage in response to a high to low transition on the signal, detecting a beginning of a low to high transition on the signal, and accelerating the low to high transition on the signal when the beginning of the low to high transition is detected.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.
REFERENCES:
patent: 4498021 (1985-02-01), Uya
patent: 5519344 (1996-05-01), Proebsting
patent: 5767700 (1998-06-01), Lee
Bobba Sudhakar
Trivedi Pradeep
Chang Daniel
Osha & May L.L.P.
Sun Microsystems Inc.
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