Electronic digital logic circuitry – Significant integrated structure – layout – or layout... – Field-effect transistor
Reexamination Certificate
2011-03-08
2011-03-08
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Significant integrated structure, layout, or layout...
Field-effect transistor
C327S535000, C326S033000, C361S055000, C361S056000, C438S129000
Reexamination Certificate
active
07902880
ABSTRACT:
Circuits and methods are provided for facilitating transitioning of a digital circuit from backgate biased standby mode to active mode. The digital circuit includes a semiconductor substrate, multiple n-channel transistors disposed at least partially in one or more p-type wells in the semiconductor substrate, multiple p-channel transistors disposed at least partially in one or more n-type wells in the semiconductor substrate, and a backgate control circuit. The backgate control circuit is electrically coupled to the p-type well(s) and to the n-type well(s) to facilitate transitioning of the multiple n-channel transistors and the multiple p-channel transistors from backgate biased standby mode to active mode by automatically shunting charge from the n-type well(s) to the p-type well(s) until a well voltage threshold is reached indicative of a completed transition of the transistors from backgate biased standby mode to active mode.
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Cho Choongyeun
Kim Dae-ik
Kim Jong-hae
Kim Moon Ju
Cho James H.
Crawford Jason M
Heslin Rothenberg Farley & & Mesiti P.C.
International Business Machines - Corporation
Radigan, Esq. Kevin P.
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