Transistor with an offset gate structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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H01L 2978

Patent

active

053028457

ABSTRACT:
At the surface of a p-type silicon substrate, n-type source/drain diffused layers are formed. On the substrate between the source/drain diffused layers, a gate insulating film made of a silicon oxide film is formed so as to be isolated from the diffused layers. A gate electrode is formed on the gate insulating film. Sidewalls are formed on the sides of the gate insulating film and gate electrode, extending upward from the substrate. In this invention, the sidewalls are composed of material whose permittivity is higher than that of the gate insulating film, for example, of a silicon nitride film.

REFERENCES:
patent: 4994869 (1991-02-01), Matloubian
patent: 5061975 (1991-10-01), Inuishi et al.
patent: 5119152 (1992-06-01), Mizuno
T. Mizuno, et al., "High Dielectric LDD Spacer Technology for High Performance MOSFET Using Gate-Fringing Field Effects", IDEM Tech. Dig., p. 613 Jan. (1989).
"New Degradation Phenomena by Source and Drain Hot-Carriers in Half-Micron P-MOSFETS", by T. Mizuno, et. al., IDEM 86, Jan. 1986 IEEE, pp. 726-729.

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