Transistor structure of memory device and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S163000, C438S197000, C438S221000, C438S225000, C438S300000, C438S283000, C438S585000, C438S700000, C438S735000

Reexamination Certificate

active

07601583

ABSTRACT:
A memory device includes an active area protruding from a semiconductor substrate. A recess is formed in the active area. A field oxide layer is formed on the semiconductor substrate. A gate electrode extends across the active area while being overlapped with the recess. A gate insulation layer is interposed between the gate electrode and the active area. Source and drain areas are formed in the active area. The transistor structure above defines a recessed transistor structure if it is sectioned along a source-drain line and defines a Fin transistor structure if it is sectioned along a gate line. The transistor structure ensures sufficient data retention time and improves the current drivability while lowering the back bias dependency of a threshold voltage.

REFERENCES:
patent: 2006/0286740 (2006-12-01), Lin et al.
patent: 2004-281761 (2004-10-01), None
patent: 2005-086024 (2005-03-01), None
patent: 10-2004-0091309 (2004-10-01), None
patent: 10-2005-0099330 (2005-10-01), None

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