Transistor structure, memory cell, DRAM, and method for...

Details Transistor structure, memory cell, DRAM, and method for... Transistor structure, memory cell, DRAM, and method for...

2007-02-27

2007-02-27

Nguyen, Cuong (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S243000, C438S508000

Reexamination Certificate

active

10975085

ABSTRACT:
Transistor structures, with one source/drain region connected to a charge storage device to be insulated includes an asymmetric gate conductor structure. At a first side wall, which faces the one source/drain region, the asymmetric gate conductor structure has a side wall oxide with a greater thickness and a bird's beak structure with a greater length than at an opposite, second side wall. An effective channel length is increased for the same feature size of the gate conductor structure. Memory cells can be realized in a higher density.

REFERENCES:
patent: 4852062 (1989-07-01), Baker et al.
patent: 5684317 (1997-11-01), Hwang
patent: 5741737 (1998-04-01), Kachelmeier
patent: 5837584 (1998-11-01), Lu et al.
patent: 5963808 (1999-10-01), Lu et al.
patent: 6207516 (2001-03-01), Tang

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