Transistor isolation process

Details Transistor isolation process Transistor isolation process

1995-11-21

1998-12-29

Fourson, George R.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438297, 438296, 438425, 438587, 438592, 438595, H01L 2176

Patent

active

058541128

ABSTRACT:
In the manufacture of semiconductor devices on a single substrate, said devices comprising a source region, a drain region and a gate therebetween, forming an isolation region after formation of the gate between said devices, thereby reducing required tolerances between devices and rows of devices and minimizing space requirements on the substrate for the array. A conventional isolation region between adjacent devices can be formed first, the layers comprising the gate deposited, the gate formed by etching through the layers, and a second isolation region between rows of devices formed after the gate etch. This reduces the built-in tolerances required between rows of devices, and reduces the spacing requirements between the rows.

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