Transistor fabrication method

Details Transistor fabrication method Transistor fabrication method

1995-04-27

1999-04-06

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438305, 438592, 438790, 438783, 438952, H01L 21331, H01L 21336

Patent

active

058917845

ABSTRACT:
A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. An anti-reflective coating helps protect against reflective gate notching. A variety of silicided and non-silicided) structures may be formed.

REFERENCES:
patent: 5139974 (1992-08-01), Sandhu et al.
patent: 5185279 (1993-02-01), Ushiku
patent: 5302538 (1994-04-01), Ishikawa et al.
patent: 5346867 (1994-09-01), Doan et al.
patent: 5352631 (1994-10-01), Sitaram et al.
patent: 5354387 (1994-10-01), Lee et al.
patent: 5395780 (1995-03-01), Hwang
patent: 5441914 (1995-08-01), Taft et al.
patent: 5445987 (1995-08-01), Kuroda et al.
patent: 5482894 (1996-01-01), Havemann
patent: 5604157 (1997-02-01), Dai et al.
patent: 5747388 (1998-05-01), Kusters et al.

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