Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-09-08
1999-06-29
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438174, 438180, 438301, 438683, 438951, 148DIG100, 257384, 257408, H01L 21336
Patent
active
059181303
ABSTRACT:
The present invention advantageously provides a method for forming a transistor in which silicide contact areas are formed to the junctions during fabrication of the transistor. The silicide contact areas may be formed using a single high temperature anneal since silicide forming near sidewalls of the gate oxide is prevented. In one embodiment, dopants are first forwarded into a lateral region of a silicon-based substrate to form an implant region. Then a silicide layer is formed across the implant region using a high temperature anneal. A sacrificial material is deposited across the silicide layer and the substrate. A contiguous opening is formed vertically through the sacrificial material and the silicide layer, exposing a portion of the substrate. Dopants of the type opposite to the dopants implanted previously are then implanted into the exposed substrate region to form a channel. Thus, the implant region is separated into source and drain regions having a channel interposed between them. Spacers may be formed on opposed sidewall surfaces of the sacrificial material within the opening. A gate oxide is then formed across the exposed region, followed by the formation of a polysilicon gate conductor across the gate oxide. A polycide is formed across the gate conductor before the sacrificial material is removed.
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Fulford Jr. H. Jim
Gardner Mark I.
Hause Fred N.
Advanced Micro Devices , Inc.
Daffer Kevin L.
Pham Long
Trinh Michael
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