Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
2006-06-27
2011-12-13
Such, Matthew W (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257SE29249
Reexamination Certificate
active
08076698
ABSTRACT:
In a transistor, an AlN buffer layer102, an undoped GaN layer103, an undoped AlGaN layer104, a p-type control layer105, and a p-type contact layer106are formed in this order on a sapphire substrate101. The transistor further includes a gate electrode110in ohmic contact with the p-type contact layer106, and a source electrode108and a drain electrode109provided on the undoped AlGaN layer104. By applying a positive voltage to the p-type control layer105, holes are injected into a channel to increase a current flowing in the channel.
REFERENCES:
patent: 4839703 (1989-06-01), Ohata et al.
patent: 4903091 (1990-02-01), Baba et al.
patent: 6281528 (2001-08-01), Wada
patent: 7038252 (2006-05-01), Saito et al.
patent: 2005/0133816 (2005-06-01), Fan et al.
patent: 2005/0189559 (2005-09-01), Saito et al.
patent: 2006/0060871 (2006-03-01), Beach
patent: 61-140181 (1986-06-01), None
patent: 61-230381 (1986-10-01), None
patent: 62-211963 (1987-09-01), None
patent: 01-183162 (1989-07-01), None
patent: 11-261053 (1999-09-01), None
patent: 2000-100828 (2000-04-01), None
patent: 2003-133332 (2003-05-01), None
patent: 2004221363 (2004-08-01), None
patent: 2004-273486 (2004-09-01), None
patent: 2005-086102 (2005-03-01), None
Machine Translation of JP 11-261053.
Hikita, M., et al., “350V/150A AlGaN/GaN power HFET on Silicon substrate with source-via grounding (SVG) structure”, Technical Digest of International Electron Devices Meeting, 2004, pp. 803-806, IEEE.
Ambacher, O., et al., “Two-dimensional electron gases induced by spontaneous and piezoelectric polarization charges in N- and Ga-face AIGaN/GaN heterostructures”, Journal of Applied Physics, Mar. 15, 2999, pages 3222-3233, vol. 85, No. 6, American institute of Physics.
Zhang, L., et al., “Epitaxially-Grown GaN Junction Field Effect Transistors”, IEEE Transactions on Electron Devices, Mar. 2000, pp. 507-511, vol. 47 No. 3, IEEE.
European Search Report issued in European Patent Application No. 06767447.3, mailed May 8, 2009.
Hu, X., et al., “Enhancement mode AIGaN/GaN HFET with selectively grownpnjunction gate”, Electronics Letters, Apr. 13, 2000, pp. 753-754, vol. 36 No. 8.
Japanese Notice of Reasons for Rejection, w/ English translation thereof, issued in Japanese Patent Application No. JP 2005-200127 dated Nov. 16, 2010.
Hikita Masahiro
Tanaka Tsuyoshi
Ueda Daisuke
Ueda Tetsuzo
Uemoto Yasuhiro
McDermott Will & Emery LLP
Naraghi Ali
Panasonic Corporation
Such Matthew W
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