Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-01-16
2007-01-16
Fleming, Fritz (Department: 2181)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S501000
Reexamination Certificate
active
10504759
ABSTRACT:
A method of asynchronously transferring data from a low speed bus to a high speed bus, comprises latching data at a first predetermined instant in a cycle of the clock frequency of the high speed bus, latching data at a second predetermined instant in the same cycle of the clock frequency of the high speed bus, a time period between the second and first predetermined instants being less than the period of the data, and either, if the values of the latched data at the first and second predetermined instants are equal, the latched data is transferred at a third predetermined instant onto the high speed bus, or, if the values sampled at the first and second predetermined instants are different, at the third predetermined instant, transferring the value of the currently present data is transferred onto the high speed bus.
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Fleming Fritz
Kim Harold
Koninklijke Philips Electronics , N.V.
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